1. Field of the Invention
The invention pertains to the field of the thermal treatment of monocrystalline silicon semiconductor wafers.
2. Description of the Related Art
Thermal treatment of silicon wafers is generally carried out in a vertical furnace (“wafer boat”). In such a furnace, a multiplicity of semiconductor wafers are simultaneously heated to high temperatures over a relatively long time period. In this case, they are placed on support rings in a manner stacked one above another and spaced apart from one another. Such a support ring (“susceptor ring”) generally consists of silicon carbide and has the task of supporting the semiconductor wafer lying thereon during thermal treatment.
The aim of thermal treatment is to provide a zone (“denuded zone”) for electronically active structures which extends from the surface into the interior of the semiconductor wafer and is free of defects which could disturb the function of electronic components. Such defects are, in particular, accumulations of precipitated oxygen, BMD (“bulk micro defects”) and defects which are formed by accumulations of vacancies and are referred to, inter alia, as COP defects (“crystal originated particles”). As a result of the thermal treatment, BMD-forming nuclei and COP defects are resolved and the oxygen concentration in the zone is decreased below the threshold necessary for BMD formation.
The larger the size of COP defects, the longer the time needed to be able to resolve them by means of a thermal treatment of the semiconductor wafer. Therefore, it is beneficial, as early as during the pulling of the single crystal yielding the semiconductor wafers from a crucible, to implement measures which generate COP defects having comparatively small dimensions. For this purpose, two measures are usually taken into consideration, which can also be combined. First, rapid cooling of the single crystal prevents vacancies from remaining mobile long enough to be able to agglomerate into comparatively large COP defects. Second, doping the single crystal with nitrogen has the effect that during cooling of the single crystal, vacancy supersaturation is delayed, and correspondingly less time is available for the formation of vacancy accumulations.
At the temperatures in the range of 1050° C. to 1300° C. which prevail during thermal treatment, the crystal lattice of monocrystalline silicon is particularly sensitive to disturbances. Temperature gradients, relative movements of semiconductor wafer and support ring owing to different coefficients of thermal expansion of silicon and silicon carbide and the intrinsic weight of the semiconductor wafer pressing onto the support ring can initiate slip in the crystal lattice or cause scratches.
Measurements of laser scattered light or measurements of the depolarization of laser light are usually used for the detection of stresses and slip. The measurement method based on the latter option is known by the acronym SIRD, which stands for “Scanning Infrared Depolarization”. US 2004/0021097 A1 describes a measurement method employing SIRD which can be used to detect defects on semiconductor wafers which are caused by the support ring.
DE 10 2005 013 831 A1 discloses that both the temperature during the thermal treatment and the concentration of nitrogen in the semiconductor wafer have a particular influence on the upper yield stress (UYS). The UYS is a characteristic variable for the resistance of the semiconductor material to the formation of slip. The resistance decreases significantly in the temperature range of 1000° C. to 1350° C., and also with a reduction of the nitrogen concentration. In order to obtain thermally treated semiconductor wafers composed of monocrystalline silicon which exhibit no slip during an SIRD measurement, the cited document recommends using the upper yield stress measured at a temperature of 1200° C. as a criterion for carrying out the thermal treatment in a specific manner. Accordingly, comparatively high heating rates in the temperature range of above 900° C. and/or comparatively high cooling rates in the temperature range down to 900° C. and the use of a closed ring as support ring during the thermal treatment are suitable for only rather relatively resistive semiconductor wafers.
JP 2003059851 A describes a support ring having an inner and an outer lateral surface, a horizontal surface for the placement of the semiconductor wafer, and a rounded or beveled edge between the inner lateral surface and the horizontal placement surface. The distance Ry between the highest peak and the deepest valley within a measurement section detecting the roughness of the edge is not greater than 5 μm.
EP 1 772 901 A2 discloses a two-part support ring, the surface roughness of which expressed in the form of the averaged roughness depth Rz is intended to be not more than 15 μm. A semiconductor wafer composed of silicon, which was heated on such a support ring at a temperature of 1200° C. over a time period of 600 min, exhibited, after the thermal treatment, no slip detectable by means of laser scattered light or depolarization of laser light.
The inventors of the present invention have found, however, that semiconductor wafers composed of monocrystalline silicon, with the use of known support rings during a thermal treatment, are exposed to stresses which can adversely affect the nanotopography of the front side of the semiconductor wafer.